Protecting digital media content
Communications of the ACM
Robust image watermarking in the spatial domain
Signal Processing
Information Hiding Techniques for Steganography and Digital Watermarking
Information Hiding Techniques for Steganography and Digital Watermarking
A secure digital camera architecture for integrated real-time digital rights management
Journal of Systems Architecture: the EUROMICRO Journal
FPGA based implementation of an invisible-robust image watermarking encoder
CIT'04 Proceedings of the 7th international conference on Intelligent Information Technology
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This paper presents novel hardware architecture for watermarking unit which can be used with the JPEG2000 compression standard. We have presented dual watermark detection which is also novelty of our algorithm. Hardware assisted watermarking offers advantages over the software implementations in terms of less area, power consumption, real time. The objective is to develop the real time low cost and robust watermarking hardware which can be incorporated with existing systems such as digital camera, scanners, camcorders etc. We have implemented CDF 5/3 wavelet filters with lifting scheme which requires less hardware and memory efficient. The present algorithm was tested with standard benchmark software StirMark. The experimental result shows that the proposed scheme of watermarking is robust against most of the geometric attacks scaling, rotation, remove lines and cropping.