FPGA based implementation of an invisible-robust image watermarking encoder

Authors:
Saraju P. Mohanty;Renuka Kumara C.;Sridhara Nayak
Affiliations:
Dept. of Computer Science and Engineering, Univ. of North Texas, Denton, TX;Manipal Centre For Information Science, Manipal Academy of Higher Education, Manipal, India;Manipal Centre For Information Science, Manipal Academy of Higher Education, Manipal, India
Venue:
CIT'04 Proceedings of the 7th international conference on Intelligent Information Technology
Year:
2004

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Abstract

Both encryption and digital watermarking techniques need to be incorporated in a digital rights management framework to address different aspects of content management. While encryption transforms original multimedia object into another form, digital watermarking leaves the original object intact and recognizable. The objective is to develop low power, real time, reliable and secure watermarking systems, which can be achieved through hardware implementations. In this paper, we present an FPGA based implementation of an invisible spatial domain watermarking encoder. The watermarking encoder consists of a watermark generator, watermark insertion module, and a controller. Most of the invisible watermarking algorithms available in the literature and also the algorithm implemented in this paper insert pseudorandom numbers to host data. Therefore, we focus on the structural design aspects of watermarking generator using linear feedback shift register. We synthesized the prototype watermarking encoder chip using Xilinx FPGA.