VLSI Implementation of Online Digital Watermarking Technique with Difference Encoding for 8-Bit Gray Scale Images

Authors:
Annajirao Garimella;M V. V. Satyanarayana;R Satish Kumar;P S. Murugesh;U C. Niranjan
Affiliations:
-;-;-;-;-
Venue:
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Year:
2003

Citing 3
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Abstract

Digital watermarking is a technique of embeddingimperceptible information into the digital documents. Inthis paper, VLSI implementation of Digital Watermarkingtechnique is presented for 8 bit gray scale images. Thisimplementation of fragile invisible watermarking iscarried out in spatial domain. The standard ASIC designflow for 0.13 µ CMOS technology has been used toimplement the algorithm. The area of the chip is 3,453 x3,453 µm 2 and the power consumption is 37.6µW.