A DCT-domain system for robust image watermarking
Signal Processing
Design of Digital Video Coding Systems: A Complete Compressed Domain Approach
Design of Digital Video Coding Systems: A Complete Compressed Domain Approach
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Watermarking Methods for MPEG Encoded Video: Towards Resolving Rightful Ownership
ICMCS '98 Proceedings of the IEEE International Conference on Multimedia Computing and Systems
Implementation of Watermark Detection System for Hardware Based Video Watermark Embedder
ICCIT '08 Proceedings of the 2008 Third International Conference on Convergence and Hybrid Information Technology - Volume 02
Hardware assisted watermarking for multimedia
Computers and Electrical Engineering
Performance Measurements of a Real-Time Digital Watermarking System for Broadcast Monitoring
ICMCS '99 Proceedings of the 1999 IEEE International Conference on Multimedia Computing and Systems - Volume 02
Implementation of Real Time Video Watermark Embedder Based on Haar Wavelet Transform Using FPGA
FGCNS '08 Proceedings of the 2008 Second International Conference on Future Generation Communication and Networking Symposia - Volume 03
VLSI architectures of perceptual based video watermarking for real-time copyright protection
ISQED '09 Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware implementation perspectives of digital video watermarking algorithms
IEEE Transactions on Signal Processing
Watermarking of MPEG-4 video objects
IEEE Transactions on Multimedia
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Existing secure embedded systems are primarily cryptography based. However, for effective Digital Rights Management (DRM) of multimedia in the framework of embedded systems, both watermarking and cryptography are necessary. In this paper, a watermarking algorithm and corresponding VLSI architectures are presented that will insert a broadcaster's logo into video streams in real-time to facilitate copyrighted video broadcasting and Internet protocol television (IP-TV). The VLSI architecture is prototyped using a hardware description language (HDL) and when realized in silicon can be deployed in any multimedia producing consumer electronics equipment to enable real-time DRM right at the source. The watermark is inserted into the video stream before MPEG-4 compression, resulting in simplified hardware requirements and superior video quality. The watermarking processing is performed in the frequency (DCT) domain. The system is initially simulated and validated in MATLAB/Simulink^(R) and subsequently prototyped on an Altera^(R) Cyclone-II FPGA using VHDL. Its maximum throughput is 43frames/s at a clock speed of 100MHz which makes it suitable for emerging real-time digital video broadcasting applications such as IP-TV. The watermarked video is of high quality, with an average Peak-Signal-to-Noise Ratio (PSNR) of 21.8dB and an average Root-Mean-Square Error (RMSE) of 20.6.