Characterizing finite Kripke structures in propositional temporal logic
Theoretical Computer Science - International Joint Conference on Theory and Practice of Software Development, P
Defining conditional independence using collapses
Theoretical Computer Science - Selected papers of the International BCS-FACS Workshop on Semantics for Concurrency, Leicester, UK, July 1990
Branching time and abstraction in bisimulation semantics
Journal of the ACM (JACM)
Reduction: a method of proving properties of parallel programs
Communications of the ACM
An improvement in formal verification
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
Lectures on Petri Nets I: Basic Models, Advances in Petri Nets, the volumes are based on the Advanced Course on Petri Nets
Ten Years of Partial Order Reduction
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Using Partial Orders to Improve Automatic Verification Methods
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Static Analysis for State-Space Reductions Preserving Temporal Logics
Formal Methods in System Design
Interrupt Verification via Thread Verification
Electronic Notes in Theoretical Computer Science (ENTCS)
Proving Correctness of an Efficient Abstraction for Interrupt Handling
Electronic Notes in Theoretical Computer Science (ENTCS)
Reducing Concurrent Analysis Under a Context Bound to Sequential Analysis
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Proceedings of the 36th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Semantic Reduction of Thread Interleavings in Concurrent Programs
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Stack bounds analysis for microcontroller assembly code
WESS '09 Proceedings of the 4th Workshop on Embedded Systems Security
Causal dataflow analysis for concurrent programs
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Delayed nondeterminism in model checking embedded systems assembly code
HVC'07 Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing
Interprocedural analysis of concurrent programs under a context bound
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
Context-Bounded model checking of concurrent software
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Interval analysis of microcontroller code using abstract interpretation of hardware and software
Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems
Loop refinement using octagons and satisfiability
SSV'10 Proceedings of the 5th international conference on Systems software verification
SimTester: a controllable and observable testing framework for embedded systems
VEE '12 Proceedings of the 8th ACM SIGPLAN/SIGOPS conference on Virtual Execution Environments
Abstract interpretation of microcontroller code: Intervals meet congruences
Science of Computer Programming
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Interrupts play an important role in embedded software. Unfortunately, they aggravate the state-explosion problem that model checking is suffering from. Therefore, we propose a new abstraction technique based on partial order reduction that minimizes the number of locations where interrupt handlers need to be executed during model checking. This significantly reduces state spaces while the validity of the verification results is preserved. The paper details the underlying static analysis which is employed to annotate the programs before verification. Moreover, it introduces a formal model which is used to prove that the presented abstraction technique preserves the validity of the branchingtime logic CTL*-X by establishing a stutter bisimulation equivalence between the abstract and the concrete transition system. Finally, the effectiveness of this abstraction is demonstrated in a case study.