A methodology for hardware verification based on logic simulation
Journal of the ACM (JACM)
Handbook of theoretical computer science (vol. B)
Model checking
Automated Software Engineering
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[mc]square: A Model Checker for Microcontroller Code
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Electronic Notes in Theoretical Computer Science (ENTCS)
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ACM Transactions on Embedded Computing Systems (TECS)
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FMICS'10 Proceedings of the 15th international conference on Formal methods for industrial critical systems
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HVC'09 Proceedings of the 5th international Haifa verification conference on Hardware and software: verification and testing
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This paper presents an approach to the efficient verification of embedded systems. Such systems usually operate in uncertain environments, giving rise to a high degree of nondeterminism in the corresponding formal models, which in turn aggravates the state explosion problem. Careful handling of nondeterminism is therefore crucial for obtaining efficient model checking tools. Here, we support this goal by developing a formal computation model and an abstraction method, called delayed nondeterminism, which instantiates nondeterministic values only if and when this is required by the application code. It is shown how this technique can be integrated into our CTL model checking tool [mc]square by introducing symbolic abstract states which represent several concrete states. We also give a simulation relation between the concrete and the abstract state space, thus establishing the soundness of delayed nondeterminism with respect to "path-universal" logics such as ACTL and LTL. Furthermore, a case study is presented in which three different programs are used to demonstrate the effectiveness of our technique.