OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems
ACM SIGARCH Computer Architecture News
Towards a comprehensive RVC VTL: a CAL description of an efficient AVC baseline encoder
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
An efficient motion estimation method for MPEG-4 video encoder
IEEE Transactions on Consumer Electronics
Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder
IEEE Transactions on Circuits and Systems for Video Technology
Towards a comprehensive RVC VTL: a CAL description of an efficient AVC baseline encoder
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
Modeling DV/DVCPRO standards on reconfigurable video coding framework
Journal of Electrical and Computer Engineering
Building multimedia security applications in the MPEG reconfigurable video coding (RVC) framework
Proceedings of the thirteenth ACM multimedia workshop on Multimedia and security
Secure computing with the MPEG RVC framework
Image Communication
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In this paper, an efficient H.264/AVC baseline encoder, described in RVC-CAL actor language, is introduced. The main aim of the paper is twofold: a) to demonstrate the flexibility and ease that is provided by RVC-CAL, which allows for efficient implementation of the presented encoder, and b) to shed light on the advantages that can be brought into the RVC framework by including such encoding tools. The main modules of the designed encoder include: Inter Frame Prediction (Motion Estimation/Compensation), Intra Frame Prediction, and Entropy Coding. Descriptions of the designed modules, accompanied with RVC-CAL design issues are provided. A comparison between different development approaches is also provided. The obtained results show that specifying complex video codecs (e.g. H.264/AVC encoder) using RVC-CAL followed by automatic translation into HDL, which is achievable by the tools that support the standard, results in more efficient HW implementation compared to the traditional HW design flow. A discussion that explains the reasons behind such results concludes the paper.