FPGA implementation of bluetooth 2.0 transceiver

  • Authors:
  • Khaled Salah Mohammed

  • Affiliations:
  • Electronic Dept., National Telecommunication Institute, Cairo, Egypt

  • Venue:
  • ICOSSE'06 Proceedings of the 5th WSEAS international conference on System science and simulation in engineering
  • Year:
  • 2006

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Abstract

In our paper we aim at combining three different types of modulation techniques, GFSK, PI/4DQPSK and 8DPSK on one common hardware platform. Goal of our project is to implement Bluetooth 2.0 on FPGA. Bluetooth 2.0 uses Gaussian Frequency Shift Keying (GFSK) as modulation technique for the header and access code, PI/4DQPSK for data (2Mpbs) and 8DPSK for data (3Mpbs). So whereas most commercial Bluetooth chips are low cost and inflexible, in our project flexibility and re-use of hardware is important. It is for that reason the Bluetooth transceiver will be done in the digital domain. The choice of the demodulation algorithm determines the channel selection requirements (better demodulation algorithms require less SNR). A simulation model was built to measure the performance of these algorithms. In our simulation model, Bluetooth signals are sampled with 16 MHz.To obtain a BER (Bit Error Rate) of 0.1%, specified by the Bluetooth standard, requires an SNR of about 15 dB. the design was synthesized using NU HORIZONS ELECTRONICS Spartan3 development board. (spartan3 400g 208).