A register-file approach for row buffer caches in die-stacked DRAMs
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
The core-C6 (CC6) sleep state of the AMD bobcat x86 microprocessor
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
Staged memory scheduling: achieving high performance and scalability in heterogeneous systems
Proceedings of the 39th Annual International Symposium on Computer Architecture
High performance and low power design techniques for ASIC and custom in nanometer technologies
Proceedings of the 2013 ACM international symposium on International symposium on physical design
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Run-time power-gating in caches of GPUs for leakage energy savings
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Bobcat is an AMD processor core designed for the low-power, mobile, lower-end desktop x86 markets. This core should push current technology in many areas while balancing performance, area, and power consumption. Bobcat supports the 64-bit AMD64 ISA, various SIMD extensions, and a full virtual machine implementation. Bobcat is featured on the AMD Fusion processor family roadmap alongside vector-based parallel processing units in accelerated processing unit configurations.