Fast Regular Expression Matching Using FPGAs
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A pattern matching coprocessor for network security
Proceedings of the 42nd annual Design Automation Conference
Fast and Scalable Pattern Matching for Network Intrusion Detection Systems
IEEE Journal on Selected Areas in Communications
| Hi-index | 0.00 |
The detection of malicious files is an important component of any intrusion detection system. Due to increase in network speeds and new worms being discovered frequently, there arises a need to detect worms on the fly without disassembling or running them. Signature-based detection is considered to be an important technique in anti-virus applications because of its accuracy and lack of false positives. by checking the signatures stored in the database. As the database of signatures increase, the time required to perform the pattern matching operation in software increases. FPGAs(Field Programmable Gate Arrays) present us with ideal platforms for these kinds of pattern matching applications since they are characterized by low cost and short application development cycles. They also provide a right compromise between flexibility of re-programming and capability in operating at high speeds. In this paper we present a design where FPGA is used as a co-processor to help out with signature matching. They can also be extended to perform inline matching where the packets can be inspected for protocol analysis.