Dynamic cache partitioning based on the MLP of cache misses

  • Authors:
  • Miquel Moreto;Francisco J. Cazorla;Alex Ramirez;Mateo Valero

  • Affiliations:
  • Universitat Politècnica de Catalunya, DAC, Barcelona, Spain and HiPEAC European Network of Excellence;Barcelona Supercomputing Center, Centro Nacional de Supercomputación, Spain;Universitat Politècnica de Catalunya, DAC, Barcelona, Spain and HiPEAC European Network of Excellence and Barcelona Supercomputing Center, Centro Nacional de Supercomputación, Spain;Universitat Politècnica de Catalunya, DAC, Barcelona, Spain and HiPEAC European Network of Excellence and Barcelona Supercomputing Center, Centro Nacional de Supercomputación, Spain

  • Venue:
  • Transactions on high-performance embedded architectures and compilers III
  • Year:
  • 2011

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Abstract

Dynamic partitioning of shared caches has been proposed to improve performance of traditional eviction policies in modern multithreaded architectures. All existing Dynamic Cache Partitioning (DCP) algorithms work on the number of misses caused by each thread and treat all misses equally. However, it has been shown that cache misses cause different impact in performance depending on their distribution. Clustered misses share their miss penalty as they can be served in parallel, while isolated misses have a greater impact on performance as the memory latency is not shared with other misses. We take this fact into account and propose a new DCP algorithm that considers misses differently depending on their influence in performance. Our proposal obtains improvements over traditional eviction policies up to 63.9% (10.6% on average) and it also outperforms previous DCP proposals by up to 15.4% (4.1% on average) in a four-core architecture. Our proposal reaches the same performance as a 50% larger shared cache. Finally, we present a practical implementation of our proposal that requires less than 8KB of storage.