Evolvable hardware in Xilinx Spartan-3 FPGA

  • Authors:
  • Rustem Popa;Dorel Aiordăchioaie;Gabriel Sîrbu

  • Affiliations:
  • Department of Electronics and Telecommunications, University "Dunărea de Jos" of Galaţi, Galaţi, Romania;Department of Electronics and Telecommunications, University "Dunărea de Jos" of Galaţi, Galaţi, Romania;Department of Electronics and Telecommunications, University "Dunărea de Jos" of Galaţi, Galaţi, Romania

  • Venue:
  • CONTROL'05 Proceedings of the 2005 WSEAS international conference on Dynamical systems and control
  • Year:
  • 2005

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Abstract

Evolvable Hardware is a hardware which modifies its own structure in order to adapt to the environment in which it is embedded. This reconfigurable hardware is implemented on a programmable circuit, whose architecture can be altered by downloading a binary bit string. These bits are adaptively acquired by evolutionary algorithms. In this paper we have used an evolutionary algorithm to design some combinational and sequential logic circuits. These designs have been implemented in a real Xilinx Spartan-3 FPGA and have been compared with other conventional designs of the same circuits. A better allocation of resources in the targeted device has been observed in almost all evolutionary designs.