Electronic logic systems (3rd ed.)
Electronic logic systems (3rd ed.)
Genetic algorithms as a computational tool for design
Genetic algorithms as a computational tool for design
Practical digital logic design and testing
Practical digital logic design and testing
Genetic algorithms + data structures = evolution programs (3rd ed.)
Genetic algorithms + data structures = evolution programs (3rd ed.)
Genetic Programming III: Darwinian Invention & Problem Solving
Genetic Programming III: Darwinian Invention & Problem Solving
Evolving Electronic Robot Controller that Exploit Hardware Resources
Proceedings of the Third European Conference on Advances in Artificial Life
An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics
ICES '96 Proceedings of the First International Conference on Evolvable Systems: From Biology to Hardware
Synthesis of Synchronous Sequential Logic Circuits from Partial Input/Output Sequences
ICES '98 Proceedings of the Second International Conference on Evolvable Systems: From Biology to Hardware
Improving Correctness of Finite-State Machine Synthesis from Multiple Partial Input/Output Sequences
EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
Bidirectional Incremental Evolution in Extrinsic Evolvable Hardware
EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Algebraic structure theory of sequential machines (Prentice-Hall international series in applied mathematics)
Digitally Evolving Models for Dynamically Adaptive Systems
SEAMS '07 Proceedings of the 2007 International Workshop on Software Engineering for Adaptive and Self-Managing Systems
Practical and scalable evolution of digital circuits
Applied Soft Computing
A three-step decomposition method for the evolutionary design of sequential logic circuits
Genetic Programming and Evolvable Machines
Evolvable hardware in Xilinx Spartan-3 FPGA
CONTROL'05 Proceedings of the 2005 WSEAS international conference on Dynamical systems and control
Evolvable hardware design based on a novel simulated annealing in an embedded system
Concurrency and Computation: Practice & Experience
A module-level three-stage approach to the evolutionary design of sequential logic circuits
Genetic Programming and Evolvable Machines
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In this paper an approach based on an evolutionary algorithm to design synchronous sequential logic circuits with minimum number of logic gates is suggested. The proposed method consists of four main stages. The first stage is concerned with the use of genetic algorithms (GA) for the state assignment problem to compute optimal binary codes for each symbolic state and construct the state transition table of finite state machine (FSM). The second stage defines the subcircuits required to achieve the desired functionality. The third stage evaluates the subcircuits using extrinsic Evolvable Hardware (EHW). During the fourth stage, the final circuit is assembled. The obtained results compare favourably against those produced by manual methods and other methods based on heuristic techniques.