Genetic algorithms as a computational tool for design
Genetic algorithms as a computational tool for design
IEEE Spectrum
WWW autonomous robotics: enabling wide area access to a computer engineering practicum
SIGCSE '02 Proceedings of the 33rd SIGCSE technical symposium on Computer science education
Principles in the Evolutionary Design of Digital Circuits—Part I
Genetic Programming and Evolvable Machines
Principles in the Evolutionary Design of Digital Circuits—Part II
Genetic Programming and Evolvable Machines
A Scalable Approach to Evolvable Hardware
Genetic Programming and Evolvable Machines
Evolving Electronic Robot Controller that Exploit Hardware Resources
Proceedings of the Third European Conference on Advances in Artificial Life
Data Compression Based on Evolvable Hardware
ICES '96 Proceedings of the First International Conference on Evolvable Systems: From Biology to Hardware
An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics
ICES '96 Proceedings of the First International Conference on Evolvable Systems: From Biology to Hardware
A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI
ICES '98 Proceedings of the Second International Conference on Evolvable Systems: From Biology to Hardware
Ant Colony System for the Design of Combinational Logic Circuits
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
A Lossless Compression Method for Halftone Images Using Evolvable Hardware
ICES '01 Proceedings of the 4th International Conference on Evolvable Systems: From Biology to Hardware
Multiple Objective Optimization with Vector Evaluated Genetic Algorithms
Proceedings of the 1st International Conference on Genetic Algorithms
Bidirectional Incremental Evolution in Extrinsic Evolvable Hardware
EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Bridging The Genotype-Phenotype Mapping For Digital Fpgas
EH '01 Proceedings of the The 3rd NASA/DoD Workshop on Evolvable Hardware
Design of combinational logic circuits through an evolutionary multiobjective optimization approach
Artificial Intelligence for Engineering Design, Analysis and Manufacturing
Evolutionary Algorithms and Theirs Use in the Design of Sequential Logic Circuits
Genetic Programming and Evolvable Machines
Evolvable hardware techniques for on-chip automated reconfiguration of programmable devices
Soft Computing - A Fusion of Foundations, Methodologies and Applications
Development Brings Scalability to Hardware Evolution
EH '05 Proceedings of the 2005 NASA/DoD Conference on Evolvable Hardware
Evolving Hardware with Self-reconfigurable connectivity in Xilinx FPGAs
AHS '06 Proceedings of the first NASA/ESA conference on Adaptive Hardware and Systems
Genetic Programming and Evolvable Machines
Improving evolvable hardware by applying the speciation technique
Applied Soft Computing
Partitioned incremental evolution of hardware using genetic programming
EuroGP'08 Proceedings of the 11th European conference on Genetic programming
An evolvable hardware system under varying illumination environment
ICNC'05 Proceedings of the First international conference on Advances in Natural Computation - Volume Part III
Evolvable hardware: using evolutionary computation to design and optimize hardware systems
IEEE Computational Intelligence Magazine
Promises and challenges of evolvable hardware
IEEE Transactions on Systems, Man, and Cybernetics, Part C: Applications and Reviews
Automated synthesis of analog electrical circuits by means ofgenetic programming
IEEE Transactions on Evolutionary Computation
Generalized Disjunction Decomposition for Evolvable Hardware
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
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The auto-design of electronic circuits for the next generation Information Technology (IT) computing environments is currently one of the most extensively studied issues in the field of evolvable hardware (EHW) architectures. It aims to improve the reliability and fault-tolerance of hardware systems using embedded techniques. As the scalability of logic circuits becomes larger and more complex nowadays, its auto-design is more and more difficult. In order to improve the efficiency and the capability of digital circuit auto-design, in this paper, a multi-objective simulated annealing (MSA)-based increasable evolution approach is proposed in an embedded system. First, an extended matrix encoding method is used to indicate the potential performance of a circuit. Therefore, the risk of deleting a circuit with a good developing potential during evolution can be reduced. Second, we consider each output of a digital circuit as an objective, and MSA is designed for digital logic circuits with gradual evolution scheme. In the process of evolution, each objective is evolved in parallel with adaptive mechanism of neighborhood and a performance evaluation. Finally, a framework of online evolution with macro-blocks is employed to implement MSA on a field-programmable gate array efficiently and securely. In our experiments, six arithmetic circuits are designed to assess the performance of MSA with gate-level and function-level approaches comparing to other algorithms. The comparison results show that our method is very efficient in the auto-design of EHW. Copyright © 2010 John Wiley & Sons, Ltd.