The ant colony optimization meta-heuristic
New ideas in optimization
Logic Synthesis and Optimization
Logic Synthesis and Optimization
AntNet: distributed stigmergetic control for communications networks
Journal of Artificial Intelligence Research
ICES '01 Proceedings of the 4th International Conference on Evolvable Systems: From Biology to Hardware
Intrinsic evolvable hardware for combinatorial synthesis based on SoC+FPGA and GPU platforms
Proceedings of the 13th annual conference companion on Genetic and evolutionary computation
Genetic Algorithm for Boolean minimization in an FPGA cluster
The Journal of Supercomputing
Evolvable hardware design based on a novel simulated annealing in an embedded system
Concurrency and Computation: Practice & Experience
Parallel algorithm for evolvable-based boolean synthesis on GPUs
Analog Integrated Circuits and Signal Processing
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In this paper we propose an application of the Ant System (AS) to optimize combinational logic circuits at the gate level. We define a measure of quality improvement in partially built circuits to compute the distances required by the AS and we consider as optimal those solutions that represent functional circuits with a minimum amount of gates. The proposed methodology is described together with some examples taken from the literature that illustrate the feasibility of the approach.