Evolutionary Synthesis of LogicCircuits Using Information Theory
Artificial Intelligence Review
Evolutionary Algorithms and Theirs Use in the Design of Sequential Logic Circuits
Genetic Programming and Evolvable Machines
Evolutionary synthesis of logic circuits using information theory
Artificial intelligence in logic design
Robot gaits evolved by combining genetic algorithms and binary hill climbing
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Evolutionary morphogenesis for multi-cellular systems
Genetic Programming and Evolvable Machines
Achieving a simple development model for 3D shapes: are chemicals necessary?
Proceedings of the 9th annual conference on Genetic and evolutionary computation
FPGA Implementation of Evolvable Characters Recognizer with Self-adaptive Mutation Rates
ICANNGA '07 Proceedings of the 8th international conference on Adaptive and Natural Computing Algorithms, Part I
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
Review: Neuromolecularware and its application to pattern recognition
Expert Systems with Applications: An International Journal
A three-step decomposition method for the evolutionary design of sequential logic circuits
Genetic Programming and Evolvable Machines
Gate-level optimization of polymorphic circuits using Cartesian genetic programming
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Task decomposition and evolvability in intrinsic evolvable hardware
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Adaptive combinational logic circuits based on intrinsic evolvable hardware
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Assembling strategies in extrinsic evolvable hardware with bidirectional incremental evolution
EuroGP'03 Proceedings of the 6th European conference on Genetic programming
Evolving multiplier circuits by training set and training vector partitioning
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
Evolution of self-diagnosing hardware
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
Implementing multi-VRC cores to evolve combinational logic circuits in parallel
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
An intrinsic evolvable hardware based on multiplexer module array
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
Designing combinational circuits with an evolutionary algorithm based on the repair technique
ICES'10 Proceedings of the 9th international conference on Evolvable systems: from biology to hardware
Challenges of evolvable hardware: past, present and the path to a promising future
Genetic Programming and Evolvable Machines
A flexible on-chip evolution system implemented on a xilinx Virtex-II pro device
ICES'05 Proceedings of the 6th international conference on Evolvable Systems: from Biology to Hardware
Evolvable hardware design based on a novel simulated annealing in an embedded system
Concurrency and Computation: Practice & Experience
Open-ended evolution to discover analogue circuits for beyond conventional applications
Genetic Programming and Evolvable Machines
On the Evolution of Hardware Circuits via Reconfigurable Architectures
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
A module-level three-stage approach to the evolutionary design of sequential logic circuits
Genetic Programming and Evolvable Machines
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Evolvable Hardware (EHW) has been proposed as a new technique to design complex systems. Often, complex systems turn out to be very difficult to evolve. The problem is that a general strategy is too difficult for the evolution process to discover directly. This paper proposes a new approach that performs incremental evolution in two directions: from complex system to sub-systems and from subsystems back to complex system. In this approach, incremental evolution gradually decomposes a complex problem into some sub-tasks. In a second step, we gradually make the tasks more challenging and general. Our approach automatically discovers the sub-tasks, their sequence as well as circuit layout dimensions. Our method is tested in a digital circuit domain and compared to direct evolution. We show that our bidirectional incremental approach can handle more complex, harder tasks and evolve them more effectively, then direct evolution.