Evolving hardware with genetic learning: a first step towards building a Darwin machine
Proceedings of the second international conference on From animals to animats 2 : simulation of adaptive behavior: simulation of adaptive behavior
Experimental comparisons of online and batch versions of bagging and boosting
Proceedings of the seventh ACM SIGKDD international conference on Knowledge discovery and data mining
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics
ICES '96 Proceedings of the First International Conference on Evolvable Systems: From Biology to Hardware
On the Automatic Design of Robust Electronics Through Artificial Evolution
ICES '98 Proceedings of the Second International Conference on Evolvable Systems: From Biology to Hardware
Aspects of Digital Evolution: Evolvability and Architecture
PPSN V Proceedings of the 5th International Conference on Parallel Problem Solving from Nature
Evolving FPGA Based Cellular Automata
SEAL'98 Selected papers from the Second Asia-Pacific Conference on Simulated Evolution and Learning on Simulated Evolution and Learning
EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices
EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
Bidirectional Incremental Evolution in Extrinsic Evolvable Hardware
EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Safe Intrinsic Evolution of Virtex Devices
EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Evolutionary Strategies And Intrinsic Fault Tolerance
EH '01 Proceedings of the The 3rd NASA/DoD Workshop on Evolvable Hardware
DeEPs: A New Instance-Based Lazy Discovery and Classification System
Machine Learning
Application of rough sets in the presumptive diagnosis of urinary system diseases
Artificial intelligence and security in computing systems
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Development Brings Scalability to Hardware Evolution
EH '05 Proceedings of the 2005 NASA/DoD Conference on Evolvable Hardware
Queue - Multiprocessors
Evolving Hardware with Self-reconfigurable connectivity in Xilinx FPGAs
AHS '06 Proceedings of the first NASA/ESA conference on Adaptive Hardware and Systems
On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition
AHS '06 Proceedings of the first NASA/ESA conference on Adaptive Hardware and Systems
SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
Introduction to Evolvable Hardware: A Practical Guide for Designing Self-Adaptive Systems (IEEE Press Series on Computational Intelligence)
Evolutionary Computation: Toward a New Philosophy of Machine Intelligence (IEEE Press Series on Computational Intelligence)
Evolutionary functional recovery in virtual reconfigurable circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications
AHS '07 Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems
Evaluation of a New Platform For Image Filter Evolution
AHS '07 Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems
The Perplexus bio-inspired reconfigurable circuit
AHS '07 Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems
Reconfigurable System Design and Verification
Reconfigurable System Design and Verification
Intermediate Level FPGA Reconfiguration for an Online EHW Pattern Recognition System
AHS '09 Proceedings of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems
Reconfigurable FPGA using genetic algorithm
Proceedings of the International Conference and Workshop on Emerging Trends in Technology
Gene finding using evolvable reasoning hardware
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
Implementing multi-VRC cores to evolve combinational logic circuits in parallel
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
Placement and Floorplanning in Dynamically Reconfigurable FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
A method for design of impulse bursts noise filters optimized for FPGA implementations
Proceedings of the Conference on Design, Automation and Test in Europe
GRACE: generative robust analog circuit exploration
EuroGP'06 Proceedings of the 2006 international conference on Applications of Evolutionary Computing
Towards rapid dynamic partial reconfiguration in video-based driver assistance systems
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
Evolving hardware by dynamically reconfiguring xilinx FPGAs
ICES'05 Proceedings of the 6th international conference on Evolvable Systems: from Biology to Hardware
HERA: Hardware evolution over reconfigurable architectures
CHANGE '11 Proceedings of the 2011 1st International Workshop on Computing in Heterogeneous, Autonomous 'N' Goal-Oriented Environments
Promises and challenges of evolvable hardware
IEEE Transactions on Systems, Man, and Cybernetics, Part C: Applications and Reviews
Explorations in design space: unconventional electronics designthrough artificial evolution
IEEE Transactions on Evolutionary Computation
Evolving oscillators in silico
IEEE Transactions on Evolutionary Computation
Generalized Disjunction Decomposition for Evolvable Hardware
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
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Traditionally, hardware circuits are realized according to techniques that follow the classical phases of design and testing. A completely new approach in the creation of hardware circuits has been proposed---the Evolvable Hardware (EHW) paradigm, which bases the circuit synthesis on a goal-oriented evolutionary process inspired by biological evolution in Nature. FPGA-based approaches have emerged as the main architectural solution to implement EHW systems. Various EHW systems have been proposed by researchers but most of them, being based on outdated chips, do not take advantage of the interesting features introduced in newer FPGAs. This article describes a project named Hardware Evolution over Reconfigurable Architectures (HERA), which aims at creating a complete and performance-oriented framework for the evolution of digital circuits, leveraging the reconfiguration technology available in FPGAs. The project is described from its birth to its current state, presenting its evolutionary technique tailored for FPGA-based circuits and the most recent enhancements to improve the scalability with respect to problem size. The developed EHW system outperforms the state of the art, proving its effectiveness in evolving both standard benchmarks and more complex real-world applications.