Core Communication Interface for FPGAs
Proceedings of the 15th symposium on Integrated circuits and systems design
Networks on Chip: A New Paradigm for Systems on Chip Design
Proceedings of the conference on Design, automation and test in Europe
Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-Offs and Limitations
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
A Lightweight Approach for Embedded Reconfiguration of FPGAs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Aquarius: a dynamically reconfigurable computing platform
Proceedings of the 20th annual conference on Integrated circuits and systems design
Performance bounds of partial run-time reconfiguration in high-performance reconfigurable computing
HPRCTA '07 Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications: held in conjunction with SC07
Data Reallocation by Exploiting FPGA Configuration Mechanisms
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Using hardware methods to improve time-predictable performance in real-time Java systems
Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems
On the Evolution of Hardware Circuits via Reconfigurable Architectures
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
RF authenticated reconfiguration-based access control protection scheme for SRAM-based FPGA IP cores
International Journal of Electronic Security and Digital Forensics
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Xilinx Virtex FPGAs offer the possibility of dynamic and partial run-time reconfiguration. This feature enables the substitution of the reconfigurable architecture within a configuration area on the chip. Beneficial here is that the architecture can be adapted to the actual demand of an application while run-time. High performance, flexibility and adaptivity of these devices raise the interest in academic research and also in industrial fields of application. This new method for designing systems isn't supported very well by tools until now. This tutorial should help designers as well as researchers in developing dynamic and partial reconfigurable systems and increase the number of area of applications exploiting this very promising methodology. As an example the design of an on-demand reconfigurable system for inner cabin automotive application will be presented.