A Hardware Implementation of a Genetic Programming System Using FPGAs and Handel-C
Genetic Programming and Evolvable Machines
The Intrinsic Evolution of Virtex Devices Through Internet Reconfigurable Logic
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
Dynamic Optimisation of Non-linear Feed Forward Circuits
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
A Pipelined Hardware Implementation of Genetic Programming Using FPGAs and Handel-C
EuroGP '02 Proceedings of the 5th European Conference on Genetic Programming
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Genetic learning based fault tolerant models for digital systems
Applied Soft Computing
A genetic representation for evolutionary fault recovery in Virtex FPGAs
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
EC'05 Proceedings of the 6th WSEAS international conference on Evolutionary computing
Evolving hardware by dynamically reconfiguring xilinx FPGAs
ICES'05 Proceedings of the 6th international conference on Evolvable Systems: from Biology to Hardware
On the Evolution of Hardware Circuits via Reconfigurable Architectures
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
| Hi-index | 0.00 |
GeneticFPGA is a Java-based tool for evolving digital circuits on Xilinx XC4000EX(tm) and XC4000XL(tm) devices. Unlike other FPGA architectures popular with Evolutionary Hardware researchers, the XC4000 series architectures cannot accept arbitrary configuration data. Only a small subset of configuration bit patterns will produce operational circuits; other configuration bit patterns produce circuits which are unreliable and may even permanently damage the FPGA device. GeneticFPGA uses novel software techniques to produce legal circuit configurations for these devices, permitting experimentation with evolvable hardware on the larger, faster, more mainstream devices. In addition, these techniques have led to methods for evolving circuits which are neither temperature, voltage, nor silicon dependent. An 8-bit counter and several digital frequency dividers have been successfully evolved using this approach. GeneticFPGA uses Xilinx's JBits(tm) interface to control the generation of bitstream configuration data and the XHWIF portable hardware interface to communicate with a variety of commercially available FPGA-based hardware. GeneticFPGA, JBits, and XHWIF are currently being ported to the Xilinx Virtex(tm) family of devices, which will provide greatly increased reconfiguration speed and circuit density.