Locality aspects and cache memory utility in microcomputers
Microprocessing and Microprogramming
Computer organization & design: the hardware/software interface
Computer organization & design: the hardware/software interface
Large-scale evolution and extinction in a hierarchically structured environment
ALIFE Proceedings of the sixth international conference on Artificial life
Evolutionary Design of Hashing Function Circuits Using an FPGA
ICES '98 Proceedings of the Second International Conference on Evolvable Systems: From Biology to Hardware
On-Line Evolution of FPGA-Based Circuits: A Case Study on Hash Functions
EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices
EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
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An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16-bit address space into an 8-bit one. The target technology is FPGA, where the search space of the algorithm is made of the combinational functions computed by cells, of the interconnection topologies and of the interconnections among cells. This circuit is readily applicable to the design of set-associative cache memories, with on-line tuning of the function during cache operation.