An intrinsic evolvable hardware based on multiplexer module array

Authors:
Jixiang Zhu;Yuanxiang Li;Guoliang He;Xuewen Xia
Affiliations:
The State's Key Laboratory of Software Engineering, WuHan University;The State's Key Laboratory of Software Engineering, WuHan University;The State's Key Laboratory of Software Engineering, WuHan University;The State's Key Laboratory of Software Engineering, WuHan University
Venue:
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
Year:
2007

Citing 7
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Abstract

In traditional, designing analog and digital electrical circuits are the tasks of hard engineering, but with the emergence of Evolvable Hardware (EHW) and many researchers' significant research in this domain, EHW has been established as a promising solution for automatic design of digital and analog circuits during the last 10-odd years. At present, the main research in EHW field is focused on the extrinsic and intrinsic evolution. In this paper, we will fix our attention on intrinsic evolution. Some researchers concentrate on how to implement intrinsic evolution, mainly including the following three aspects: The first, evolve the bitstream directly and then recompose the bitstream; The second, amend the content of Look-Up-Table (LUT) by relative tools; The third, set up a virtual circuit on a physical chip, and then evolve its "parameters" which are defined by the deviser, when the parameters are changed, the corresponding circuit is evolved. This paper ignores the first and the second approaches, and proposes a virtual circuit based on Multiplexer Module Array (MMA) which is implemented on a Xilinx Virtex-II Pro (XC2VP20) FPGA.