Automatic decomposition of scientific programs for parallel execution
POPL '87 Proceedings of the 14th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Predictability of Process Resource Usage: A Measurement-Based Study on UNIX
IEEE Transactions on Software Engineering
Optimal selection theory for superconcurrency
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
Loop distribution with arbitrary control flow
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Static dependent costs for estimating execution time
LFP '94 Proceedings of the 1994 ACM conference on LISP and functional programming
Active pages: a computation model for intelligent memory
Proceedings of the 25th annual international symposium on Computer architecture
Mapping irregular applications to DIVA, a PIM-based data-intensive architecture
SC '99 Proceedings of the 1999 ACM/IEEE conference on Supercomputing
A Survey of Parallel Machine Organization and Programming
ACM Computing Surveys (CSUR)
IEEE Micro
A statement based parallelizing framework for processor-in-memory architectures
Information Processing Letters
MINT: A Front End for Efficient Simulation of Shared-Memory Multiprocessors
MASCOTS '94 Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
HCW '98 Proceedings of the Seventh Heterogeneous Computing Workshop
HCW '99 Proceedings of the Eighth Heterogeneous Computing Workshop
HCW '99 Proceedings of the Eighth Heterogeneous Computing Workshop
FlexRAM: Toward an Advanced Intelligent Memory System
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
PSS: A Novel Statement Scheduling Mechanism for a High-Performance SoC Architecture
ICPADS '04 Proceedings of the Parallel and Distributed Systems, Tenth International Conference
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Processor-in-memory is a new class of computer architecture designed for reducing the performance gap between the processor and the memory. This architecture provides a tightly-coupled heterogeneous environment by integrating different processors in a system. An efficient parallelization and optimization mechanism is necessary for this system to transform the existed applications to achieve better performance. In this paper, we propose a comprehensive framework, COSPIM, based on the statement viewpoint in our early SAGE system. It integrates program decomposition, ETC (expected time to compute) evaluation and scheduling mechanisms together. We describe how COSPIM splits statements and produces schedule to execute on the host processor and the coprocessor simultaneously. The experimental results of this approach are also discussed.