Languages and Compilers for Parallel Computing
Toward to utilize the heterogeneous multiple processors of the chip multiprocessor architecture
EUC'07 Proceedings of the 2007 international conference on Embedded and ubiquitous computing
COSPIM: a program optimization system for tightly-coupled heterogeneous environments
ICCOMP'06 Proceedings of the 10th WSEAS international conference on Computers
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Continuous improvements in semiconductorfabrication density are supporting new classes ofSystem-on-a-Chip (SoC) architectures that combineextensive processing logic/processor with high-densitymemory. Such architectures are generally calledProcessor-in-Memory (PIM) or Intelligent Memory(I-RAM) and can support high-performance computingby reducing the performance gap between the processorand the memory. The PIM architecture combines variousprocessors in a single system. These processors arecharacterized by their computation and memory-accesscapabilities. Therefore, a novel strategy must bedeveloped to identify their capabilities and dispatch themost appropriate jobs to them in order to exploit themfully. Accordingly, this study presents a new automaticsource-to-source parallelizing system, called SAGE, toexploit the advantages of PIM architectures. Unlikeconventional iteration-based parallelizing systems,SAGE adopts statement-based analyzing approaches. Itadopts a new pair-selection scheduling (PSS)mechanism to achieve better utilization and workloadbalance between the host and memory processors ofPIM architectures. This paper also providesperformance results and comparison of severalbenchmarks to demonstrate the capability of this newscheduling algorithm.