Architectural support for fast symmetric-key cryptography
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Improving A Solution's Quality Through Parallel Processing
The Journal of Supercomputing
PLFG: A Highly Scalable Parallel Pseudo-random Number Generator for Monte Carlo Simulations
HPCN Europe 2000 Proceedings of the 8th International Conference on High-Performance Computing and Networking
Speeding up Prime Number Generation
ASIACRYPT '91 Proceedings of the International Conference on the Theory and Applications of Cryptology: Advances in Cryptology
Efficient Generation of Prime Numbers
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Accelerating private-key cryptography via multithreading on symmetric multiprocessors
ISPASS '03 Proceedings of the 2003 IEEE International Symposium on Performance Analysis of Systems and Software
GridCrypt: high performance symmetric key cryptography using enterprise grids
PDCAT'04 Proceedings of the 5th international conference on Parallel and Distributed Computing: applications and Technologies
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In this research, we proposed a parallel processing algorithm that runs on cluster architecture suitable for prime number generation. The proposed approach is meant to decrease computational cost and accelerate the prime number generation process. Several experimental results are shown to demonstrate the viability of our work.