The MAGMA algebra system I: the user language
Journal of Symbolic Computation - Special issue on computational algebra and number theory: proceedings of the first MAGMA conference
Cracking DES: Secrets of Encryption Research, Wiretap Politics and Chip Design
Cracking DES: Secrets of Encryption Research, Wiretap Politics and Chip Design
Analysis of Bernstein's Factorization Circuit
ASIACRYPT '02 Proceedings of the 8th International Conference on the Theory and Application of Cryptology and Information Security: Advances in Cryptology
Factoring Large Numbers with the Twinkle Device (Extended Abstract)
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2)
FCCM '06 Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Solving Multiple Right Hand Sides linear equations
Designs, Codes and Cryptography
Non-wafer-Scale Sieving Hardware for the NFS: Another Attempt to Cope with 1024-Bit
EUROCRYPT '07 Proceedings of the 26th annual international conference on Advances in Cryptology
A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
PRESENT: An Ultra-Lightweight Block Cipher
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Algebraic and Slide Attacks on KeeLoq
Fast Software Encryption
IEEE Transactions on Computers
Analysis and optimization of the TWINKLE factoring device
EUROCRYPT'00 Proceedings of the 19th international conference on Theory and application of cryptographic techniques
SAC'07 Proceedings of the 14th international conference on Selected areas in cryptography
A zero-dimensional gröbner basis for AES-128
FSE'06 Proceedings of the 13th international conference on Fast Software Encryption
SHARK: a realizable special hardware sieving device for factoring 1024-bit integers
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Scalable hardware for sparse systems of linear equations, with applications to integer factorization
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
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In [23] Raddum and Semaev propose a technique to solve systems of polynomial equations over F2 as occurring in algebraic attacks on block ciphers. This approach is known as MRHS, and we present a special purpose architecture to implement MRHS in a dedicated hardware device. Our preliminary performance analysis of this Parallel Elimination Technique Supporting Nice Algebraic Key Elimination shows that the use of ASICs seems to enable significant performance gains over a software implementation of MRHS. The main parts of the proposed architecture are scalable, the limiting factor being mainly the available bandwidth for interchip communication. Our focus is on a design choice that can be implemented within the limits of available fab technology. The proposed design can be expected to offer a running time improvement in the order of several magnitudes over a software implementation. We do not make any claims about the practical feasibility of an attack against AES-128 with our design, as we do not see the necessary theoretical tools to be available: deriving reliable running time estimates for an algebraic attack with MRHS when being applied to a full-round version of AES-128 is still an open problem.