The role of membrane threshold and rate in STDP silicon neuron circuit simulation

  • Authors:
  • Juan Huo;Alan Murray

  • Affiliations:
  • School of Electronics and Engineering, The University of Edinburgh, Edinburgh, UK;School of Electronics and Engineering, The University of Edinburgh, Edinburgh, UK

  • Venue:
  • ICANN'05 Proceedings of the 15th international conference on Artificial neural networks: formal models and their applications - Volume Part II
  • Year:
  • 2005

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Abstract

Spike-timing dependent synaptic plasticity (STDP) circuitry is designed in 0.35µm CMOS VLSI. By setting different circuit parameters and generating diverse spike inputs, we got different steady weight distributions. Through analysing these simulation results, we show the effect of membrane threshold and input rate in STDP adaptation.