FPGA discrete wavelet transform encoder/decoder implementation

Authors:
Pedro Henrique Cox;Aparecido Augusto de Carvalho
Affiliations:
Fundacão Universidade Federal de Mato Grosso do Sul, Cidade Universitária, Campo Grande MS, Brazil;Universidade do Estado de São Paulo, Faculdade de Engenharia de Ilha Solteira, Ilha Solteira SP, Brazil
Venue:
ICONIP'06 Proceedings of the 13th international conference on Neural information processing - Volume Part III
Year:
2006

Citing 5
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Abstract

In a multi-input an multi-output feedforward wavelet neural network, orthogonal wavelet basis functions are used as activate function instead of sigmoid function of feedforward network. This paper adresses the solution on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced up to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. One integrated circuit Encoder/Decoder, ultrasonic range, is presented.