Multicore Simulation of Transaction-Level Models Using the SoC Environment

Authors:
Weiwei Chen;Xu Han;Rainer Doemer
Affiliations:
University of California, Irvine;University of California, Irvine,;University of California, Irvine
Venue:
IEEE Design & Test
Year:
2011

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Abstract

Editor's note:To address the limitations of discrete-event simulation engines, this article presents an extension of the SoC simulation kernel to support parallel simulation on multicore hosts. The proposed optimized simulator enables fast validation of large multicore SoC designs by issuing multiple simulation threads simultaneously while ensuring safe synchronization.—Prabhat Mishra, University of Florida