An analogue model of the memristor

Authors:
Juraj Valsa;Dalibor Biolek;Zdeněk Biolek
Affiliations:
Institute of Theoretical and Experimental Electrical Engineering, Brno University of Technology, Kolejní 4, Brno, Czech Republic;Institute of Microelectronics, Brno University of Technology, Udolni 53, Brno, Czech Republic and Institute of EE, University of Defence, Kounicova 65, Brno, Czech Republic;Department of IT, SSIER, Skolni 1610, Roznov p.R., Czech Republic
Venue:
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
Year:
2011

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Abstract

The paper presents a working electrical scheme modeling the memristor. The scheme allows experimenting with the model under various testing signals. The user can use it to verify the theoretical presumptions about the memristor properties. Examples of several typical measurements are shown. Copyright © 2010 John Wiley & Sons, Ltd.