Offline symbolic analysis to infer Total Store Order

  • Authors:

  • Dongyoon Lee;Mahmoud Said;Satish Narayanasamy;Zijiang Yang

  • Affiliations:

  • University of Michigan, Ann Arbor;Western Michigan University;University of Michigan, Ann Arbor;Western Michigan University

  • Venue:
  • HPCA '11 Proceedings of the 2011 IEEE 17th International Symposium on High Performance Computer Architecture
  • Year:
  • 2011

Quantified Score

Hi-index 0.00

Visualization

Abstract

Ability to record and replay an execution can significantly help programmers debug their programs, especially parallel programs. De-terministically replaying a multiprocessor's execution under a relaxed memory model has remained a challenging problem. This is an important problem as most modern processors only support a relaxed memory model to enable many performance critical optimizations. The most common consistency model implemented in processors is the Total Store Order (TSO). We present an efficient and low-complexity processor based solution for recording and replaying under the Total Store Order (TSO) memory model. Processor provides support for logging data fetched on cache misses. Using this information each thread can be de-terministically replayed. A TSO-compliant casual order between the shared-memory accesses executed in different threads is then inferred using an offline algorithm based on Satisfiability Modulo Theory (SMT) solver. We also discuss methods to bound the search space during offline analysis and several optimizations to reduce the offline analysis time.