Performing bitwise logic operations in cache using spintronics-based magnetic tunnel junctions

  • Authors:
  • Shruti Patil;David J. Lilja

  • Affiliations:
  • University of Minnesota, Minneapolis, MN;University of Minnesota, Minneapolis, MN

  • Venue:
  • Proceedings of the 8th ACM International Conference on Computing Frontiers
  • Year:
  • 2011

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Abstract

Recent exciting developments in the emerging field of spintronics have enabled rapid advances in spintronic devices such as magnetic tunnel junctions (MTJs). While MTJs are being primarily used as the basic devices in non-volatile memory, they have also been shown to accomplish primitive logic functions. However, the spintronic nature of the logic operation makes it challenging to accomplish tasks such as cascading of logic gates, operations on multiple outputs, and various combinations of these. In order to enable these primary functions, we propose the idea of adding interconnections between MTJ devices in a spintronic memory array. With this added connectivity, we show that the memory array gains the ability to perform bitwise logic operations on the data stored within it without intermediate computing circuits. We demonstrate that the basic logic operations of NAND, AND, OR and XOR operations can be performed in the memory array using the memory devices themselves. We describe the algorithms for performing the logic operations in memory and introduce the notion of a 'footprint' to compare the complexities of the operations in terms of their memory usage, data requirements and time steps. Taking into account the minimum interconnection requirements of these logic functions, we propose the design of a general spintronic logic-in-cache block and demonstrate the ADD function with it.