eNVy: a non-volatile, main memory storage system
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Real-time garbage collection for flash-memory storage systems of real-time embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Algorithms and data structures for flash memories
ACM Computing Surveys (CSUR)
μ-FTL:: a memory-efficient flash translation layer supporting multiple mapping granularities
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
Storage coding for wear leveling in flash memories
IEEE Transactions on Information Theory
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The paper represents an approach for designing and implementing a hybrid variant of a flash translation layer. The two classic realizations are the page-mapping FTL and the block-mapping FTL. The page-mapping FTL keeps an address table referring each page of the flash memory array, which is very flexible but takes much space in the RAM because it keeps a descriptor for each page. The block-mapping FTL on the other hand keeps an address table of the blocks which takes far less space but its effectiveness is degraded because of the lack of proper addressing scheme and that's why it is not used frequently. In this paper we will expose an algorithm which in a way combines the two classic approaches and thus mitigates the negative impact of the straightforward solutions.