Task ordering and memory management problem for degree of parallelism estimation

Authors:
Sergiu Carpov;Jacques Carlier;Dritan Nace;Renaud Sirdey
Affiliations:
CEA, LIST, Embedded Real Time Systems Laboratory, Gif-sur-Yvette Cedex, France and UMR CNRS 6599 Heudiasyc, Université de Technologie de Compiègne, Compiègne Cedex, France;UMR CNRS 6599 Heudiasyc, Université de Technologie de Compiègne, Compiègne Cedex, France;UMR CNRS 6599 Heudiasyc, Université de Technologie de Compiègne, Compiègne Cedex, France;CEA, LIST, Embedded Real Time Systems Laboratory, Gif-sur-Yvette Cedex, France
Venue:
COCOON'11 Proceedings of the 17th annual international conference on Computing and combinatorics
Year:
2011

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Abstract

This paper is devoted to the problem of estimating the achievable degree of parallelism for a parallel algorithm with respect to a bandwidth constraint. In a compiler chain for embedded parallel microprocessors such an estimation can be used to fix an appropriate target for parallelism reduction "tools". Informally, our problem consists in task ordering and memory management for an algorithm, so as to minimize the number of memory accesses. After a brief survey of the literature, we prove the NP-hardness of this problem and introduce a polynomial special case. We then present a branch and bound procedure for the general case along with computational results interpretation demonstrating its practical relevance.