A lightweight 256-bit hash function for hardware and low-end devices: lesamnta-LW

  • Authors:
  • Shoichi Hirose;Kota Ideguchi;Hidenori Kuwakado;Toru Owada;Bart Preneel;Hirotaka Yoshida

  • Affiliations:
  • Graduate School of Engineering, University of Fukui, Bunkyo, Fukui, Japan;Systems Development Laboratory, Hitachi, Ltd., Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa, Japan;Graduate School of Engineering, Kobe University, Nada, kobe, Japan;Systems Development Laboratory, Hitachi, Ltd., Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa, Japan;Department of Electrical Engineering ESAT/SCD-COSIC, Katholieke Universiteit Leuven, Heverlee, Belgium;Systems Development Laboratory, Hitachi, Ltd., Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa, Japan and Department of Electrical Engineering ESAT/SCD-COSIC, Katholieke Universiteit Leuven, Heverlee, ...

  • Venue:
  • ICISC'10 Proceedings of the 13th international conference on Information security and cryptology
  • Year:
  • 2010

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Abstract

This paper proposes a new lightweight 256-bit hash function Lesamnta-LW with claimed security levels of at least 2120 with respect to collision, preimage, and second preimage attacks. We adopt the Merkle-Damgård domain extension; the compression function is constructed from a dedicated AES-based block cipher using the LW1 mode, for which a security reduction can be proven. In terms of lightweight implementations, Lesamnta-LW offers a competitive advantage over other 256-bit hash functions. Our size-optimized hardware implementation of Lesamnta-LW requires only 8.24 Kgates on 90 nm technology. Our software implementation of Lesamnta-LW requires only 50 bytes of RAM and runs fast on short messages on 8-bit CPUs.