Low complexity LDPC code decoders for next generation standards
Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient Serial Message-Passing Schedules for LDPC Decoding
IEEE Transactions on Information Theory
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In this paper, we consider a layered decoding algorithm for a performance improvement of LDPC. The proposed algorithm is based on a serial scheduling algorithm for the layered decoding of LDPC in which we consider check node degree, variable node degree, and the edge connection between the each node. Simulation results show that the proposed method improves about 0.2dB SNR gain compared with random schedule in a layered decoding. Especially when the number of iteration is low, the performance gain gets larger, which case is applicable to the WPAN system which requires low power consumption and low latency.