Parallel Processing: From Applications to Systems
Parallel Processing: From Applications to Systems
EURASIP Journal on Advances in Signal Processing
Controller synthesis for mapping partitioned programs on array architectures
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
IEEE Transactions on Signal Processing
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In this paper, we address a new approach for near-real-time enhancement of large-scale Geospatial and aerial remote sensing (RS) imagery that aggregates descriptive and Bayesian convex regularization paradigms for solving the image reconstruction inverse problems with efficient systolic-based neural network (NN) computing. This task is approached via Hardware-Software (HW/SW) codesign oriented at the Field Programmable Gate Array (FPGA) digital implementation that unifies the NN-adapted image enhancement/reconstruction techniques with a novel efficient computational architecture based on a Network of Systolic Arrays (NSA). We demonstrate how such unification reduces drastically the computational load of the real-world RS image enhancement/reconstruction tasks resulting in efficient numerical algorithms suitable for quasi real-time NN-adapted implementation with the existing generation of the FPGA-based digital processors that implement the proposed NSA computational architecture.