An optimal implementation on FPGA of a hopfield neural network

Authors:
W. Mansour;R. Ayoubi;H. Ziade;R. Velazco;W. EL Falou
Affiliations:
TIMA Laboratory, Grenoble, France;Department of Computer Engineering, University of Balamand, Tripoli, Lebanon;Electrical and Electronics Department, Faculty of Engineering I, Lebanese University, Tripoli, Lebanon;TIMA Laboratory, Grenoble, France;Electrical and Electronics Department, Faculty of Engineering I, Lebanese University, Tripoli, Lebanon and Lebanese French University of Technology and Applied Sciences, Tripoli, Lebanon
Venue:
Advances in Artificial Neural Systems
Year:
2011

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Abstract

The associative Hopfield memory is a form of recurrent Artificial Neural Network (ANN) that can be used in applications such as pattern recognition, noise removal, information retrieval, and combinatorial optimization problems. This paper presents the implementation of the Hopfield Neural Network (HNN) parallel architecture on a SRAM-based FPGA. Themain advantage of the proposed implementation is its high performance and cost effectiveness: it requires O(1) multiplications and O(log N) additions, whereas most others require O(N) multiplications and O(N) additions.