ACM Transactions on Computer Systems (TOCS)
In-network services for customization in next-generation networks
IEEE Network: The Magazine of Global Internetworking
Design of a secure packet processor
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Securing multi-core multi-threaded packet processors
Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems
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Programmable packet processors have replaced traditional fixed-function custom logic in the data path of routers. This programmability introduces new vulnerabilities in these systems that can lead to new types of network attacks. We propose a modular packet processor monitoring technique that can help in detecting and avoiding such attacks. Using information about the processing time distribution of individual modules, input/output traffic characteristics can be inferred and abnormal behavior can be detected.