Design tradeoffs in modern software transactional memory systems
LCR '04 Proceedings of the 7th workshop on Workshop on languages, compilers, and run-time support for scalable systems
A flexible framework for implementing software transactional memory
Proceedings of the 21st annual ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications
Versioned boxes as the basis for memory transactions
Science of Computer Programming - Special issue: Synchronization and concurrency in object-oriented languages
Concurrent programming without locks
ACM Transactions on Computer Systems (TOCS)
On the correctness of transactional memory
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
Stretching transactional memory
Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation
Transactional Memory, 2nd Edition
Transactional Memory, 2nd Edition
Lock-free and scalable multi-version software transactional memory
Proceedings of the 16th ACM symposium on Principles and practice of parallel programming
DISC'06 Proceedings of the 20th international conference on Distributed Computing
Efficient support for in-place metadata in transactional memory
Euro-Par'12 Proceedings of the 18th international conference on Parallel Processing
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Many common workloads rely on arrays as a basic data structure on top of which they build more complex behavior. Others use them because they are a natural representation for their problem domains. Software Transactional Memory (STM) has been proposed as a new concurrency control mechanism that simplifies concurrent programming. Yet, most STM implementations have no special representation for arrays. This results, on many STMs, in inefficient internal representations, where much overhead is added while tracking each array element individually, and on other STMs in false-sharing conflicts, because writes to different elements on the same array result in a conflict. In this work we propose new designs for array implementations that are integrated with the STM, allowing for improved performance and reduced memory usage for read-dominated workloads, and present the results of our implementation of the new designs on top of the JVSTM, a Java library STM.