Discovering and understanding performance bottlenecks in transactional applications
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
Transactions as the foundation of a memory consistency model
DISC'10 Proceedings of the 24th international conference on Distributed computing
Architectural Support for Fair Reader-Writer Locking
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Transactional conflict decoupling and value prediction
Proceedings of the international conference on Supercomputing
HyFlow: a high performance distributed software transactional memory framework
Proceedings of the 20th international symposium on High performance distributed computing
An implementation of composable memory transactions in Haskell
SC'11 Proceedings of the 10th international conference on Software composition
Atomic boxes: coordinated exception handling with transactional memory
Proceedings of the 25th European conference on Object-oriented programming
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Automatic fine-grain locking using shape properties
Proceedings of the 2011 ACM international conference on Object oriented programming systems languages and applications
Proceedings of the 2011 ACM international conference on Object oriented programming systems languages and applications
Proceedings of the 2011 ACM international conference on Object oriented programming systems languages and applications
Strict serializability is harmless: a new architecture for enterprise applications
Proceedings of the ACM international conference companion on Object oriented programming systems languages and applications companion
LUTS: a lightweight user-level transaction scheduler
ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I
Lightweight transactional arrays for read-dominated workloads
ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part II
A transactional memory with automatic performance tuning
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
Resource-sensitive synchronization inference by abduction
POPL '12 Proceedings of the 39th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
SPECTRE: speculation to hide communication latency
Proceedings of the Second Asia-Pacific Workshop on Systems
Applying transactional memory to concurrency bugs
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
Dataflow execution of sequential imperative programs on multicore architectures
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Hardware transactional memory for GPU architectures
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
STM in the small: trading generality for performance in software transactional memory
Proceedings of the 7th ACM european conference on Computer Systems
A quorum-based replication framework for distributed software transactional memory
OPODIS'11 Proceedings of the 15th international conference on Principles of Distributed Systems
Lifting the barriers --- reducing latencies with transparent transactional memory
ICDCN'12 Proceedings of the 13th international conference on Distributed Computing and Networking
The runtime abort graph and its application to software transactional memory optimization
CGO '11 Proceedings of the 9th Annual IEEE/ACM International Symposium on Code Generation and Optimization
Dynamically accelerating client-side web applications through decoupled execution
CGO '11 Proceedings of the 9th Annual IEEE/ACM International Symposium on Code Generation and Optimization
Circuit design of a dual-versioning L1 data cache
Integration, the VLSI Journal
SnCTM: reducing false transaction aborts by adaptively changing the source of conflict detection
Proceedings of the 9th conference on Computing Frontiers
STM concurrency control for embedded real-time software with tighter time bounds
Proceedings of the 49th Annual Design Automation Conference
Static analysis and compiler design for idempotent processing
Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation
Delegation and nesting in best-effort hardware transactional memory
Proceedings of the twenty-fourth annual ACM symposium on Parallelism in algorithms and architectures
On the liveness of transactional memory
PODC '12 Proceedings of the 2012 ACM symposium on Principles of distributed computing
End-to-end sequential consistency
Proceedings of the 39th Annual International Symposium on Computer Architecture
Disciplined concurrent programming using tasks with effects
HotPar'12 Proceedings of the 4th USENIX conference on Hot Topics in Parallelism
Weak atomicity for the x86 memory consistency model
Journal of Parallel and Distributed Computing
Capturing transactional memory application's behavior --- the prerequisite for performance analysis
MSEPT'12 Proceedings of the 2012 international conference on Multicore Software Engineering, Performance, and Tools
On open nesting in distributed transactional memory
Proceedings of the 5th Annual International Systems and Storage Conference
Visualizing transactional memory
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
Sandboxing transactional memory
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
A transactional runtime system for the Cell/BE architecture
Journal of Parallel and Distributed Computing
What scientific applications can benefit from hardware transactional memory?
SC '12 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
An integrated pseudo-associativity and relaxed-order approach to hardware transactional memory
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Transactional access to shared memory in starss, a task based programming model
Euro-Par'12 Proceedings of the 18th international conference on Parallel Processing
STM systems: enforcing strong isolation between transactions and non-transactional code
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
Pessimistic software lock-elision
DISC'12 Proceedings of the 26th international conference on Distributed Computing
A composable mixed mode concurrency control semantics for transactional programs
ICFEM'12 Proceedings of the 14th international conference on Formal Engineering Methods: formal methods and software engineering
FastLane: improving performance of software transactional memory for low thread counts
Proceedings of the 18th ACM SIGPLAN symposium on Principles and practice of parallel programming
The tasks with effects model for safe concurrency
Proceedings of the 18th ACM SIGPLAN symposium on Principles and practice of parallel programming
TigerQuoll: parallel event-based JavaScript
Proceedings of the 18th ACM SIGPLAN symposium on Principles and practice of parallel programming
Concurrent libraries with foresight
Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation
A programming language perspective on transactional memory consistency
Proceedings of the 2013 ACM symposium on Principles of distributed computing
FaulTM: error detection and recovery using hardware transactional memory
Proceedings of the Conference on Design, Automation and Test in Europe
Verifying safety and liveness for the FlexTM hybrid transactional memory
Proceedings of the Conference on Design, Automation and Test in Europe
TagTM - accelerating STMs with hardware tags for fast meta-data access
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Correctness of an STM Haskell implementation
Proceedings of the 18th ACM SIGPLAN international conference on Functional programming
Hyflow2: a high performance distributed transactional memory framework in scala
Proceedings of the 2013 International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools
OCTET: capturing and controlling cross-thread dependences efficiently
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
Multiverse: efficiently supporting distributed high-level speculation
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
Isolation for nested task parallelism
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
Proceedings of the 21st International conference on Real-Time Networks and Systems
Evaluation of two formulations of the conjugate gradients method with transactional memory
Euro-Par'13 Proceedings of the 19th international conference on Parallel Processing
Energy efficient GPU transactional memory via space-time optimizations
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
Boosting timestamp-based transactional memory by exploiting hardware cycle counters
ACM Transactions on Architecture and Code Optimization (TACO)
Techniques to improve performance in requester-wins hardware transactional memory
ACM Transactions on Architecture and Code Optimization (TACO)
Profile-guided transaction coalescing—lowering transactional overheads by merging transactions
ACM Transactions on Architecture and Code Optimization (TACO)
Performance evaluation of View-Oriented Transactional Memory
Parallel Computing
A survey of support for structured communication in concurrency control models
Journal of Parallel and Distributed Computing
Using Dynamic Runtime Testing for Rapid Development of Architectural Simulators
International Journal of Parallel Programming
Removal of Conflicts in Hardware Transactional Memory Systems
International Journal of Parallel Programming
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The advent of multicore processors has renewed interest in the idea of incorporating transactions into the programming model used to write parallel programs. This approach, known as transactional memory, offers an alternative, and hopefully better, way to coordinate concurrent threads. The ACI (atomicity, consistency, isolation) properties of transactions provide a foundation to ensure that concurrent reads and writes of shared data do not produce inconsistent or incorrect results. At a higher level, a computation wrapped in a transaction executes atomically - either it completes successfully and commits its result in its entirety or it aborts. In addition, isolation ensures the transaction produces the same result as if no other transactions were executing concurrently. Although transactions are not a parallel programming panacea, they shift much of the burden of synchronizing and coordinating parallel computations from a programmer to a compiler, to a language runtime system, or to hardware. The challenge for the system implementers is to build an efficient transactional memory infrastructure. This book presents an overview of the state of the art in the design and implementation of transactional memory systems, as of early spring 2010. Table of Contents: Introduction / Basic Transactions / Building on Basic Transactions / Software Transactional Memory / Hardware-Supported Transactional Memory / Conclusions