Delegation and nesting in best-effort hardware transactional memory

  • Authors:

  • Yujie Liu;Stephan Diestelhorst;Michael Spear

  • Affiliations:

  • Lehigh University, Bethlehem, PA, USA;Advanced Micro Devices, Inc. and Dresden University of Technology, Dresden, Germany;Lehigh University, Bethlehem, PA, USA

  • Venue:
  • Proceedings of the twenty-fourth annual ACM symposium on Parallelism in algorithms and architectures
  • Year:
  • 2012

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Abstract

The guiding design principle behind best-effort hardware transactional memory (BEHTM) is simplicity of implementation and verification. Only minimal modifications to the base processor architecture are allowed, thereby reducing the burden of verification and long-term support. In exchange, the hardware can support only relatively simple multiword atomic operations, and must fall back to a software run-time for any operation that exceeds the abilities of the hardware. This paper demonstrates that BEHTM simplicity does not prohibit advanced and complex transactional behaviors. We exploit support for immediate non-transactional stores in the AMD Advanced Synchronization Facility to build a mechanism for communication among transactions. While our system allows arbitrary communication patterns, we focus on a design point where each transaction communicates with a system-wide manager thread. The API for the manager thread allows BEHTM transactions to delegate unsafe operations (such as system calls) to helper threads, and also enables the creation of nested parallel transactions. This paper also explores which forms of nesting are possible, and identifies constraints on nesting that are a consequence of how BEHTM is designed.