Virtualizing Transactional Memory
Proceedings of the 32nd annual international symposium on Computer Architecture
Energy reduction in multiprocessor systems using transactional memory
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
TAPE: a transactional application profiling environment
Proceedings of the 19th annual international conference on Supercomputing
Characterization of TCC on Chip-Multiprocessors
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
Autolocker: synchronization inference for atomic sections
Conference record of the 33rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Unbounded Transactional Memory
IEEE Micro
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
Controlling program execution through binary instrumentation
ACM SIGARCH Computer Architecture News - Special issue on the 2005 workshop on binary instrumentation and application
The Atomos transactional programming language
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Compiler and runtime support for efficient software transactional memory
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Architectural Semantics for Practical Transactional Memory
Proceedings of the 33rd annual international symposium on Computer Architecture
Bulk Disambiguation of Speculative Threads in Multiprocessors
Proceedings of the 33rd annual international symposium on Computer Architecture
Testing implementations of transactional memory
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
A flexible framework for implementing software transactional memory
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AVIO: detecting atomicity violations via access interleaving invariants
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Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Unbounded page-based transactional memory
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Supporting nested transactional memory in logTM
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Tradeoffs in transactional memory virtualization
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Hardware tansactional memory support for lightweight dynamic language evolution
Companion to the 21st ACM SIGPLAN symposium on Object-oriented programming systems, languages, and applications
Atomicity via source-to-source translation
Proceedings of the 2006 workshop on Memory system performance and correctness
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Architectural Support for Software Transactional Memory
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
A practical FPGA-based framework for novel CMP research
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Executing Java programs with transactional memory
Science of Computer Programming - Special issue: Synchronization and concurrency in object-oriented languages
Nested transactional memory: model and architecture sketches
Science of Computer Programming - Special issue: Synchronization and concurrency in object-oriented languages
Concurrent programming without locks
ACM Transactions on Computer Systems (TOCS)
Starvation-free commit arbitration policies for transactional memory systems
ACM SIGARCH Computer Architecture News
A hardware/software framework for supporting transactional memory in a MPSoC environment
ACM SIGARCH Computer Architecture News
Making the fast case common and the uncommon case simple in unbounded transactional memory
Proceedings of the 34th annual international symposium on Computer architecture
Performance pathologies in hardware transactional memory
Proceedings of the 34th annual international symposium on Computer architecture
MetaTM/TxLinux: transactional memory for an operating system
Proceedings of the 34th annual international symposium on Computer architecture
An integrated hardware-software approach to flexible transactional memory
Proceedings of the 34th annual international symposium on Computer architecture
Enforcing isolation and ordering in STM
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Optimistic parallelism requires abstractions
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Understanding Tradeoffs in Software Transactional Memory
Proceedings of the International Symposium on Code Generation and Optimization
Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language
Proceedings of the International Symposium on Code Generation and Optimization
Speculative optimization using hardware-monitored guarded regions for java virtual machines
Proceedings of the 3rd international conference on Virtual execution environments
ATLAS: a chip-multiprocessor with transactional memory support
Proceedings of the conference on Design, automation and test in Europe
Contention resolution with heterogeneous job sizes
ESA'06 Proceedings of the 14th conference on Annual European Symposium - Volume 14
TxLinux: using and managing hardware transactional memory in an operating system
Proceedings of twenty-first ACM SIGOPS symposium on Operating systems principles
The transactional memory / garbage collection analogy
Proceedings of the 22nd annual ACM SIGPLAN conference on Object-oriented programming systems and applications
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
Toward high performance nonblocking software transactional memory
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
Learning from mistakes: a comprehensive study on real world concurrency bug characteristics
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
The potential for variable-granularity access tracking for optimistic parallelism
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Energy efficient synchronization techniques for embedded architectures
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Against lock-based semantics for transactional memory
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
RaceTM: detecting data races using transactional memory
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Adaptive transaction scheduling for transactional memory systems
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Practical weak-atomicity semantics for java stm
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ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
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Flexible Decoupled Transactional Memory Support
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
CAR-STM: scheduling-based collision avoidance and resolution for software transactional memory
Proceedings of the twenty-seventh ACM symposium on Principles of distributed computing
Single global lock semantics in a weakly atomic STM
ACM SIGPLAN Notices
Bristlecone: A Language for Robust Software Systems
ECOOP '08 Proceedings of the 22nd European conference on Object-Oriented Programming
Scalable and reliable communication for hardware transactional memory
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming
Early experience with a commercial hardware transactional memory implementation
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
Version management alternatives for hardware transactional memory
Proceedings of the 9th workshop on MEmory performance: DEaling with Applications, systems and architecture
DracoSTM: a practical C++ approach to software transactional memory
LCSD '07 Proceedings of the 2007 Symposium on Library-Centric Software Design
An analytic framework for performance modeling of software transactional memory
Computer Networks: The International Journal of Computer and Telecommunications Networking
Access Control and Information Flow in Transactional Memory
Formal Aspects in Security and Trust
Modeling software transactional memory with AnyLogic
Proceedings of the 2nd International Conference on Simulation Tools and Techniques
Software transactional memory for multicore embedded systems
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Stretching transactional memory
Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation
An Analytic Model for Optimistic STM with Lazy Locking
ASMTA '09 Proceedings of the 16th International Conference on Analytical and Stochastic Modeling Techniques and Applications
NZTM: nonblocking zero-indirection transactional memory
Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures
Certifying concurrent programs using transactional memory
Journal of Computer Science and Technology
SPMTM: A Novel ScratchPad Memory Based Hybrid Nested Transactional Memory Framework
APPT '09 Proceedings of the 8th International Symposium on Advanced Parallel Processing Technologies
On-chip transactional memory system for FPGAs using TCC model
Proceedings of the 6th FPGAworld Conference
EazyHTM: eager-lazy hardware transactional memory
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Early experience with a commercial hardware transactional memory implementation
Early experience with a commercial hardware transactional memory implementation
From lock to correct and efficient software transactional memory
Proceedings of the 2010 Workshop on Interaction between Compilers and Computer Architecture
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FSTTCS'07 Proceedings of the 27th international conference on Foundations of software technology and theoretical computer science
Keep off the grass: locking the right path for atomicity
CC'08/ETAPS'08 Proceedings of the Joint European Conferences on Theory and Practice of Software 17th international conference on Compiler construction
CC'08/ETAPS'08 Proceedings of the Joint European Conferences on Theory and Practice of Software 17th international conference on Compiler construction
Directory-based conflict detection in hardware transactional memory
HiPC'08 Proceedings of the 15th international conference on High performance computing
Proceedings of the 37th annual international symposium on Computer architecture
Hardware transactional memory: A high performance parallel programming model
Journal of Systems Architecture: the EUROMICRO Journal
Journal of Parallel and Distributed Computing
Journal of Parallel and Distributed Computing
Journal of Parallel and Distributed Computing
Implementation tradeoffs in the design of flexible transactional memory support
Journal of Parallel and Distributed Computing
Evaluation of a hardware transactional memory model in an NoC-based embedded MPSoC
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
LV*: a class of lazy versioning HTMs for low-cost integration of transactional memory systems
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies
A Dynamically Adaptable Hardware Transactional Memory
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Formal reasoning about lazy-STM programs
Journal of Computer Science and Technology
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
Efficient partial roll-backing mechanism for transactional memory systems
Transactions on high-performance embedded architectures and compilers III
Transactional conflict decoupling and value prediction
Proceedings of the international conference on Supercomputing
Multiset signatures for transactional memory
Proceedings of the international conference on Supercomputing
ZEBRA: a data-centric, hybrid-policy hardware transactional memory design
Proceedings of the international conference on Supercomputing
Real-time wait-free queues using micro-transactions
Proceedings of the 9th International Workshop on Java Technologies for Real-Time and Embedded Systems
Composable, nestable, pessimistic atomic statements
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ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I
FlexSig: Implementing flexible hardware signatures
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ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
ICDCIT'10 Proceedings of the 6th international conference on Distributed Computing and Internet Technology
Conflict detection and validation strategies for software transactional memory
DISC'06 Proceedings of the 20th international conference on Distributed Computing
DISC'06 Proceedings of the 20th international conference on Distributed Computing
Software transactional memory validation – time and space considerations
Transactions on High-Performance Embedded Architectures and Compilers IV
Improving performance by reducing aborts in hardware transactional memory
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
Energy and throughput efficient transactional memory for embedded multicore systems
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
Hardware support for enforcing isolation in lock-based parallel programs
Proceedings of the 26th ACM international conference on Supercomputing
Delegation and nesting in best-effort hardware transactional memory
Proceedings of the twenty-fourth annual ACM symposium on Parallelism in algorithms and architectures
Evaluation of Blue Gene/Q hardware support for transactional memories
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
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An integrated pseudo-associativity and relaxed-order approach to hardware transactional memory
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SCIN-cache: Fast speculative versioning in multithreaded cores
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TSO_ATOMICITY: efficient hardware primitive for TSO-preserving region optimizations
Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems
Wait-n-GoTM: improving HTM performance by serializing cyclic dependencies
Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems
Verifying safety and liveness for the FlexTM hybrid transactional memory
Proceedings of the Conference on Design, Automation and Test in Europe
SI-TM: reducing transactional memory abort rates through snapshot isolation
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
Techniques to improve performance in requester-wins hardware transactional memory
ACM Transactions on Architecture and Code Optimization (TACO)
Efficient execution of speculative threads and transactions with hardware transactional memory
Future Generation Computer Systems
Removal of Conflicts in Hardware Transactional Memory Systems
International Journal of Parallel Programming
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Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional memory, called UTM, which exploits the common case for performance without sacrificing correctness on transactions whose footprint can be nearly as large as virtual memory. We performed a cycle-accurate simulation of a simplified architecture, called LTM. LTM is based on UTM but is easier to implement, because it does not change the memory subsystem outside of the processor. LTM allows nearly unbounded transactions, whose footprint is limited only by physical memory size and whose duration by the length of a timeslice. We assess UTM and LTM through microbenchmarking and by automatically converting the SPECjvm98 Java benchmarks and the Linux 2.4.19 kernel to use transactions instead of locks. We use both cycle-accurate simulation and instrumentation to understand benchmark behavior. Our studies show that the common case is small transactions that commit, even when contention is high, but that some applications contain very large transactions. For example, although 99.9% of transactions in the Linux study touch 54 cache lines or fewer, some transactions touch over 8000 cache lines. Our studies also indicate that hardware support is required, because some applications spend over half their time in critical regions. Finally, they suggest that hardware support for transactions can make Java programs runfaster than when run using locks and can increase the concurrency of the Linux kernel by as much as a factor of 4 with no additional programming work.