SPLASH: Stanford parallel applications for shared-memory
ACM SIGARCH Computer Architecture News
Transactional memory: architectural support for lock-free data structures
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
The SPLASH-2 programs: characterization and methodological considerations
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Proceedings of the fourteenth annual ACM symposium on Principles of distributed computing
A scalable approach to thread-level speculation
Proceedings of the 27th annual international symposium on Computer architecture
Transaction Processing: Concepts and Techniques
Transaction Processing: Concepts and Techniques
Transactional lock-free execution of lock-based programs
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Enhancing software reliability with speculative threads
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Software transactional memory for dynamic-sized data structures
Proceedings of the twenty-second annual symposium on Principles of distributed computing
Language support for lightweight transactions
OOPSLA '03 Proceedings of the 18th annual ACM SIGPLAN conference on Object-oriented programing, systems, languages, and applications
Transactional Memory Coherence and Consistency
Proceedings of the 31st annual international symposium on Computer architecture
IBM Systems Journal
Unbounded Transactional Memory
HPCA '05 Proceedings of the 11th International Symposium on High-Performance Computer Architecture
Composable memory transactions
Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming
Virtualizing Transactional Memory
Proceedings of the 32nd annual international symposium on Computer Architecture
AtomCaml: first-class atomicity via rollback
Proceedings of the tenth ACM SIGPLAN international conference on Functional programming
Characterization of TCC on Chip-Multiprocessors
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
X10: an object-oriented approach to non-uniform cluster computing
OOPSLA '05 Proceedings of the 20th annual ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
The Atomos transactional programming language
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Compiler and runtime support for efficient software transactional memory
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Adaptive software transactional memory
DISC'05 Proceedings of the 19th international conference on Distributed Computing
The Atomos transactional programming language
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Supporting nested transactional memory in logTM
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Tradeoffs in transactional memory virtualization
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
What do high-level memory models mean for transactions?
Proceedings of the 2006 workshop on Memory system performance and correctness
Memory models for open-nested transactions
Proceedings of the 2006 workshop on Memory system performance and correctness
Atomicity via source-to-source translation
Proceedings of the 2006 workshop on Memory system performance and correctness
Queue - Computer Architecture
Architectural Support for Software Transactional Memory
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Executing Java programs with transactional memory
Science of Computer Programming - Special issue: Synchronization and concurrency in object-oriented languages
Transactional collection classes
Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming
Open nesting in software transactional memory
Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming
Proceedings of the 34th annual international symposium on Computer architecture
An effective hybrid transactional memory system with strong isolation guarantees
Proceedings of the 34th annual international symposium on Computer architecture
Performance pathologies in hardware transactional memory
Proceedings of the 34th annual international symposium on Computer architecture
MetaTM/TxLinux: transactional memory for an operating system
Proceedings of the 34th annual international symposium on Computer architecture
Enforcing isolation and ordering in STM
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language
Proceedings of the International Symposium on Code Generation and Optimization
Speculative optimization using hardware-monitored guarded regions for java virtual machines
Proceedings of the 3rd international conference on Virtual execution environments
TxLinux: using and managing hardware transactional memory in an operating system
Proceedings of twenty-first ACM SIGOPS symposium on Operating systems principles
The transactional memory / garbage collection analogy
Proceedings of the 22nd annual ACM SIGPLAN conference on Object-oriented programming systems and applications
Multithreaded software transactional memory and OpenMP
MEDEA '07 Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture
Safer open-nested transactions through ownership
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
Communications of the ACM - Web science
Safe open-nested transactions through ownership
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
Adaptive transaction scheduling for transactional memory systems
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
TxLinux and MetaTM: transactional memory and the operating system
Communications of the ACM - Enterprise information integration: and other tools for merging data
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Rerun: Exploiting Episodes for Lightweight Memory Race Recording
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Transactional Memory and OpenMP
IWOMP '07 Proceedings of the 3rd international workshop on OpenMP: A Practical Programming Model for the Multi-Core Era
Nebelung: execution environment for transactional OpenMP
International Journal of Parallel Programming
Safe open-nested transactions through ownership
Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming
Maximum benefit from a minimal HTM
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
DracoSTM: a practical C++ approach to software transactional memory
LCSD '07 Proceedings of the 2007 Symposium on Library-Centric Software Design
xCalls: safe I/O in memory transactions
Proceedings of the 4th ACM European conference on Computer systems
Dependence-aware transactional memory for increased concurrency
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Transactifying Apache's cache module
SYSTOR '09 Proceedings of SYSTOR 2009: The Israeli Experimental Systems Conference
Fast memory snapshot for concurrent programmingwithout synchronization
Proceedings of the 23rd international conference on Supercomputing
EazyHTM: eager-lazy hardware transactional memory
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Using a configurable processor generator for computer architecture prototyping
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Is transactional programming actually easier?
Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
From lock to correct and efficient software transactional memory
Proceedings of the 2010 Workshop on Interaction between Compilers and Computer Architecture
Implementing and evaluating nested parallel transactions in software transactional memory
Proceedings of the twenty-second annual ACM symposium on Parallelism in algorithms and architectures
Hardware transactional memory: A high performance parallel programming model
Journal of Systems Architecture: the EUROMICRO Journal
Journal of Parallel and Distributed Computing
LV*: a class of lazy versioning HTMs for low-cost integration of transactional memory systems
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies
Euro-Par'10 Proceedings of the 16th international Euro-Par conference on Parallel processing: Part II
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Efficient partial roll-backing mechanism for transactional memory systems
Transactions on high-performance embedded architectures and compilers III
Hardware transactional memory with software-defined conflicts
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
Compiler support for fine-grain software-only checkpointing
CC'12 Proceedings of the 21st international conference on Compiler Construction
Support for fine-grained synchronization in shared-memory multiprocessors
PaCT'07 Proceedings of the 9th international conference on Parallel Computing Technologies
An integrated pseudo-associativity and relaxed-order approach to hardware transactional memory
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Transactional Memory Architecture and Implementation for IBM System Z
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Robust architectural support for transactional memory in the power architecture
Proceedings of the 40th Annual International Symposium on Computer Architecture
Removal of Conflicts in Hardware Transactional Memory Systems
International Journal of Parallel Programming
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Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional state buffering and conflict resolution. Missing is a robust hardware/software interface, not limited to simplistic instructions defining transaction boundaries. Without rich semantics, current TM systems cannot support basic features of modern programming languages and operating systems such as transparent library calls, conditional synchronization, system calls, I/O, and runtime exceptions. This paper presents a comprehensive instruction set architecture (ISA) for TM systems. Our proposal introduces three key mechanisms: two-phase commit; support for software handlers on commit, violation, and abort; and full support for open- and closed-nested transactions with independent rollback. These mechanisms provide a flexible interface to implement programming language and operating system functionality. We also show that these mechanisms are practical to implement at the ISA and microarchitecture level for various TM systems. Using an execution-driven simulation, we demonstrate both the functionality (e.g., I/O and conditional scheduling within transactions) and performance potential (2.2脳 improvement for SPECjbb2000) of the proposed mechanisms. Overall, this paper establishes a rich and efficient interface to foster both hardware and software research on transactional memory.