Compiler and runtime support for efficient software transactional memory

  • Authors:

  • Ali-Reza Adl-Tabatabai;Brian T. Lewis;Vijay Menon;Brian R. Murphy;Bratin Saha;Tatiana Shpeisman

  • Affiliations:

  • Intel Labs, Santa Clara, CA;Intel Labs, Santa Clara, CA;Intel Labs, Santa Clara, CA;Intel China Research Center, Beijing, China;Intel Labs, Santa Clara, CA;Intel Labs, Santa Clara, CA

  • Venue:
  • Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
  • Year:
  • 2006

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Abstract

Programmers have traditionally used locks to synchronize concurrent access to shared data. Lock-based synchronization, however, has well-known pitfalls: using locks for fine-grain synchronization and composing code that already uses locks are both difficult and prone to deadlock. Transactional memory provides an alternate concurrency control mechanism that avoids these pitfalls and significantly eases concurrent programming. Transactional memory language constructs have recently been proposed as extensions to existing languages or included in new concurrent language specifications, opening the door for new compiler optimizations that target the overheads of transactional memory.This paper presents compiler and runtime optimizations for transactional memory language constructs. We present a high-performance software transactional memory system (STM) integrated into a managed runtime environment. Our system efficiently implements nested transactions that support both composition of transactions and partial roll back. Our JIT compiler is the first to optimize the overheads of STM, and we show novel techniques for enabling JIT optimizations on STM operations. We measure the performance of our optimizations on a 16-way SMP running multi-threaded transactional workloads. Our results show that these techniques enable transactional memory's performance to compete with that of well-tuned synchronization.