NePaLTM: Design and Implementation of Nested Parallelism for Transactional Memory Systems

  • Authors:
  • Haris Volos;Adam Welc;Ali-Reza Adl-Tabatabai;Tatiana Shpeisman;Xinmin Tian;Ravi Narayanaswamy

  • Affiliations:
  • University of Wisconsin Madison, WI 53706;Intel Corporation Santa Clara, CA 95054;Intel Corporation Santa Clara, CA 95054;Intel Corporation Santa Clara, CA 95054;Intel Corporation Santa Clara, CA 95054;Intel Corporation Santa Clara, CA 95054

  • Venue:
  • Genoa Proceedings of the 23rd European Conference on ECOOP 2009 --- Object-Oriented Programming
  • Year:
  • 2009

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Abstract

Transactional memory (TM) promises to simplify construction of parallel applications by allowing programmers to reason about interactions between concurrently executing code fragments in terms of high-level properties they should possess. However, all currently existing TM systems deliver on this promise only partially by disallowing parallel execution of computations performed inside transactions. This paper fills in that gap by introducing NePaLTM (Nested PAralleLism for Transactional Memory), the first TM system supporting nested parallelism inside transactions. We describe a programming model where TM constructs (atomic blocks) are integrated with OpenMP constructs enabling nested parallelism. We also discuss the design and implementation of a working prototype where atomic blocks can be used for concurrency control at an arbitrary level of nested parallelism. Finally, we present a performance evaluation of our system by comparing transactions-based concurrency control mechanism for nested parallel computations with a mechanism already provided by OpenMP based on mutual exclusion.