Algorithms for scalable synchronization on shared-memory multiprocessors
ACM Transactions on Computer Systems (TOCS)
Transactional memory: architectural support for lock-free data structures
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
ARB: A Hardware Mechanism for Dynamic Reordering of Memory References
IEEE Transactions on Computers
Data speculation support for a chip multiprocessor
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Clustered speculative multithreaded processors
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The Superthreaded Processor Architecture
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A scalable approach to thread-level speculation
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Removing architectural bottlenecks to the scalability of speculative parallelization
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The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors
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Proceedings of the twenty-second annual symposium on Principles of distributed computing
LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation
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A cost-driven compilation framework for speculative parallelization of sequential programs
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Pin: building customized program analysis tools with dynamic instrumentation
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Understanding The Linux Kernel
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ACM Transactions on Architecture and Code Optimization (TACO)
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Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
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Optimistic parallelism benefits from data partitioning
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A comprehensive strategy for contention management in software transactional memory
Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming
Copy or Discard execution model for speculative parallelization on multicores
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Fast Track: A Software System for Speculative Program Optimization
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Speculative parallelization of sequential loops on multicores
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Speculative parallelization using state separation and multiple value prediction
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Speculative parallelization using state separation and multiple value prediction
Proceedings of the 2010 international symposium on Memory management
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Proceedings of the 16th ACM symposium on Principles and practice of parallel programming
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Proceedings of the 16th ACM symposium on Principles and practice of parallel programming
ALTER: exploiting breakable dependences for parallelization
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Effective parallelization of loops in the presence of I/O operations
Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation
Optimizing software runtime systems for speculative parallelization
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General data structure expansion for multi-threading
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International Journal of Parallel Programming
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The availability of multicore processors has led to significant interest in compiler techniques for speculative parallelization of sequential programs. Isolation of speculative state from non-speculative state forms the basis of such speculative techniques as this separation enables recovery from misspeculations. In our prior work on CorD [35,36] we showed that for array and scalar variable based programs copying of data between speculative and non-speculative memory can be highly optimized to support state separation that yields significant speedups on multicore machines available today. However, we observe that in context of heap-intensive programs that operate on linked dynamic data structures, state separation based speculative parallelization poses many challenges. The copying of data structures from non-speculative to speculative state (copy-in operation) can be very expensive due to the large sizes of dynamic data structures. The copying of updated data structures from speculative state to non-speculative state (copy-out operation) is made complex due to the changes in the shape and size of the dynamic data structure made by the speculative computation. In addition, we must contend with the need to translate pointers internal to dynamic data structures between their non-speculative and speculative memory addresses. In this paper we develop an augmented design for the representation of dynamic data structures such that all of the above operations can be performed efficiently. Our experiments demonstrate significant speedups on a real machine for a set of programs that make extensive use of heap based dynamic data structures.