Single global lock semantics in a weakly atomic STM

  • Authors:
  • Vijay Menon;Steven Balensiefer;Tatiana Shpeisman;Ali-Reza Adl-Tabatabai;Richard L. Hudson;Bratin Saha;Adam Welc

  • Affiliations:
  • Intel Labs, Santa Clara, CA;University of Washington, Seattle, WA;Intel Labs, Santa Clara, CA;Intel Labs, Santa Clara, CA;Intel Labs, Santa Clara, CA;Intel Labs, Santa Clara, CA;Intel Labs, Santa Clara, CA

  • Venue:
  • ACM SIGPLAN Notices
  • Year:
  • 2008

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Abstract

As memory transactions have been proposed as a language-level replacement for locks, there is growing need for well-defined semantics. In contrast to database transactions, transaction memory (TM) semantics are complicated by the fact that programs may access the same memory locations both inside and outside transactions. Strongly atomic semantics, where non-transactional accesses are treated as implicit single-operation transactions, remain difficult to provide without specialized hardware support and/or significant performance overhead. As an alternative, many in the community have informally proposed that a single global lock semantics [16, 9], where transaction semantics are mapped to those of regions protected by a single global lock, provide an intuitive and efficiently implementable model for programmers. In this paper, we explore the implementation and performance implications of single global lock semantics in a weakly atomic STM from the perspective of Java, and we discuss why even recent STM implementations fall short of these semantics. We describe a new weakly atomic Java STM implementation that provides single global lock semantics while permitting concurrent execution, but we show that this comes at a significant performance cost. We also propose and implement various alternative semantics that loosen single lock requirements while still providing strong guarantees. We compare our new implementations to previous ones, including a strongly atomic STM. [22]