Virtualizing Transactional Memory

  • Authors:

  • Ravi Rajwar;Maurice Herlihy;Konrad Lai

  • Affiliations:

  • Intel Corporation;Brown University;Intel Corporation

  • Venue:
  • Proceedings of the 32nd annual international symposium on Computer Architecture
  • Year:
  • 2005

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Abstract

Writing concurrent programs is difficult because of the complexity of ensuring proper synchronization. Conventional lock-based synchronization suffers from wellknown limitations, so researchers have considered non-blocking transactions as an alternative. Recent hardware proposals have demonstrated how transactions can achieve high performance while not suffering limitations of lock-based mechanisms. However, current hardware proposals require programmers to be aware of platform-specific resource limitations such as buffer sizes, scheduling quanta, as well as events such as page faults, and process migrations. If the transactional model is to gain wide acceptance, hardware support for transactions must be virtualized to hide these limitations in much the same way that virtual memory shields the programmer from platform-specific limitations of physical memory. This paper proposes Virtual Transactional Memory (VTM), a user-transparent system that shields the programmer from various platform-specific resource limitations. VTM maintains the performance advantage of hardware transactions, incurs low overhead in time, and has modest costs in hardware support. While manysystem-level challenges remain, VTM takes a step toward making transactional models more widely acceptable.