Early experience with a commercial hardware transactional memory implementation

  • Authors:
  • Dave Dice;Yossi Lev;Mark Moir;Daniel Nussbaum

  • Affiliations:
  • Sun Microsystems Laboratories, Burlington, MA, USA;Brown University and Sun Microsystems Laboratories, Providence, RI, USA;Sun Microsystems Laboratories, Burlington, MA, USA;Sun Microsystems Laboratories, Burlington, MA, USA

  • Venue:
  • Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
  • Year:
  • 2009

Quantified Score

Hi-index 0.03

Visualization

Abstract

We report on our experience with the hardware transactional memory (HTM) feature of two pre-production revisions of a new commercial multicore processor. Our experience includes a number of promising results using HTM to improve performance in a variety of contexts, and also identifies some ways in which the feature could be improved to make it even better. We give detailed accounts of our experiences, sharing techniques we used to achieve the results we have, as well as describing challenges we faced in doing so.