Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack

  • Authors:

  • Dave Christie;Jae-Woong Chung;Stephan Diestelhorst;Michael Hohmuth;Martin Pohlack;Christof Fetzer;Martin Nowack;Torvald Riegel;Pascal Felber;Patrick Marlier;Etienne Rivière

  • Affiliations:

  • Advanced Micro Devices, Inc., Sunnyvale, CA, USA;Advanced Micro Devices, Inc., Sunnyvale, CA, USA;Advanced Micro Devices, Inc., Sunnyvale, CA, USA;Advanced Micro Devices, Inc., Sunnyvale, CA, USA;Advanced Micro Devices, Inc., Sunnyvale, CA, USA;Technische Universität Dresden, Dresden, Germany;Technische Universität Dresden, Dresden, Germany;Technische Universität Dresden, Dresden, Germany;Universite de Neuchatel, Neuchatel, Switzerland;Universite de Neuchatel, Neuchatel, Switzerland;Universite de Neuchatel, Neuchatel, Switzerland

  • Venue:
  • Proceedings of the 5th European conference on Computer systems
  • Year:
  • 2010

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Abstract

AMD's Advanced Synchronization Facility (ASF) is an x86 instruction set extension proposal intended to simplify and speed up the synchronization of concurrent programs. In this paper, we report our experiences using ASF for implementing transactional memory. We have extended a C/C++ compiler to support language-level transactions and generate code that takes advantage of ASF. We use a software fallback mechanism for transactions that cannot be committed within ASF (e.g., because of hardware capacity limitations). Our evaluation uses a cycle-accurate x86 simulator that we have extended with ASF support. Building a complete ASF-based software stack allows us to evaluate the performance gains that a user-level program can obtain from ASF. Our measurements on a wide range of benchmarks indicate that the overheads traditionally associated with software transactional memories can be significantly reduced with the help of ASF.